Month
November 2016
The nu+ web site is online. Edit: the nu+ design has now become the Naples Processing Unit (NaplesPU)!
First nu+ system successfully ported to proDesign proFPGA quad motherboard equipped with Xilinx Virtex7-2000T. Now, nu+ has a complete memory system and fully supports proFPGA Virtex7-2000T 4GB DDR3. LEDs are blinking!
This paper, authored by Edo Fusella and me, got published! This completes our series of works on application-driven design of on-chip optical interconnect architectures. (Note: these works, of course, have nothing to do with physics or device design, but rather… Continue Reading →
I’m part of the DATE 2017 Technical Program Committee (Topic D10 Reconfigurable Computing). Today we met in Montpellier for the TPC meeting, where we discussed about submissions and reviews, and took the final decisions about the accepted full papers and… Continue Reading →
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