On-chip interconnects provide a vital facility for highly parallel MultiProcessor Systems-on-Chip, particularly in data-intensive applications. This survey –authored by me and Edoardo Fusella– gives an in-depth overview of application-driven design automation solutions for on-chip interconnects, particularly hierarchical buses, crossbars, and cascaded crossbars, or any combination of them.
Design automation for application-specific on-chip interconnects: A survey (Journal Article)
Integration, the VLSI Journal, 52 , pp. 102–121, 2016.