Alessandro Cilardo's blog

proudly surviving in Italian academia

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Talking about home-grown computing technologies

I had the honour of participating in a roundtable on “Security and Data Flows in the European Union”, where I gave a talk on the key role of home-grown computing technologies as a strategic national asset. The event was organized… Continue Reading →

And MANGO is over!

The final review meeting of the MANGO project has been successfully held on May 23rd in the nice village of Le Lieu, Switzerland, in the EATON’s facility hosting the prototype. The MANGO monster was presented live to the EU project officer… Continue Reading →

A new HPC project: RECIPE

RECIPE: REliable power and time-ConstraInts-aware Predictive management of heterogeneous Exascale systems is a new European Project targeted at HPC, that includes my group’s contribution and, indeed, directly builds on the outcome of MANGO. RECIPE aims at developing a runtime resource… Continue Reading →

Many theses available for the Intel HARP programme!

As soon as we finilize the Non-Disclosure Agreements requested by Intel, we’ll be ready for a bunch of exciting activities involving new ideas for the tightly integrated CPU+FPGA platforms. Stay tuned!

Friday sunset from the office window

.. and the sea in the distance. Lucky view from the office. (Just wanted to share it.)

Ready for Intel HARP

Last October I got the Intel Hardware Accelerator Research Program (HARP) grant. Intel invited the recipients to San Jose, CA, for presenting their new multi-chip package (MCP) technology and early access to platforms and tools provided through HARP. According to… Continue Reading →

What legacy from EU projects? Panel @ HiPEAC/PEGPUM

What legacy from EU projects? I’m part of this panel –second from the left here– in the Power-Efficient GPU and heterogeneous Multi-/Many-core Computing (PEGPUM) workshop, during the European Network on High Performance and Embedded Architecture and Compilation (HiPEAC) conference in… Continue Reading →

JSA highly cited paper

not a fan of bibliometrics, but anyway.. Just got this nice certificate from Elsevier

Two-minute talk on GPU-like computing @ H2020 InfoDay on ICT05

Just given a short presentation on “Harnessing the FPGA potential through GPU-like programming” in Brussels, European Commission Auditorium, during the H2020 Info Day on ICT 5 Customised and low energy computing. The event page and my presentation on the European… Continue Reading →

The nu+ web site is online

The nu+ web site is online. Edit: the nu+ design has now become the Naples Processing Unit (NaplesPU)!

nu+ ported to proDesign proFPGA!

First nu+ system successfully ported to proDesign proFPGA quad motherboard equipped with Xilinx Virtex7-2000T. Now, nu+ has a complete memory system and fully supports proFPGA Virtex7-2000T 4GB DDR3. LEDs are blinking!

lighting up on-chip communications

This paper, authored by Edo Fusella and me, got published! This completes our series of works on application-driven design of on-chip optical interconnect architectures. (Note: these works, of course, have nothing to do with physics or device design, but rather… Continue Reading →

DATE 2017 TPC meeting in Montpellier

I’m part of the DATE 2017 Technical Program Committee (Topic D10 Reconfigurable Computing). Today we met in Montpellier for the TPC meeting, where we discussed about submissions and reviews, and took the final decisions about the accepted full papers and… Continue Reading →

MANGO meeting in Lausanne

On October 27th and 28th we’ve been discussing about the developments of MANGO in the nice city of Lausanne at EPFL. Among other things, I’ve reported about the integration of a Scratchpad Memory in nu+, the LLVM compiler backend, and… Continue Reading →

MANGO and nu+ @ Futuro Remoto

MANGO and nu+ have been part of our educational booth at Futuro Remoto, a large Science Festival taking place in Naples, this year reaching its 30th edition (a couple of links for the event in English and Italian). The festival… Continue Reading →

Ever thought you can build your own GPU shared memory?

During the last years Field Programmable Gate Arrays have become increasingly important for high-performance computing. A possible way to effectively (and easily) exploit them is to rely on a GPU-like paradigm. Interestingly, there are a number of GPU-like HDL projects… Continue Reading →

DATE: my 13th year!

With three papers in the main conference, two presentations in the hosted Friday workshops, and one chaired session, this is my 13th year at the Design Automation and Test in Europe (DATE) conference. Cheers!

A couple of thoughts about scientific production

Many of my activities are described in my publications and are linked with past/ongoing research projects. In my course of research I’ve been avoiding low-quality venues and predatory journals (at least, I tried to do so most of the time)… Continue Reading →

Invited Talk @ HiPEAC CSW

I just gave an invited talk on “Reconfigurability in HPC: opportunities and challenges” at the HiPEAC Computing Systems Week (CSW) in Milan, during a session on Challenges and Opportunities in Next-Generation HPC Systems for Real-Time Applications, gathering together experiences from… Continue Reading →

Altera SoC Award @ FPL 2015

Altera Innovate Europe contest won! I designed and supervised the development of an FPGA-based accelerator for Homomorphic Encryption. Because of its potential implications on emerging FPGA-accelerated server scenarios (and maybe the gripping presentation delivered with the hardware design), the accelerator… Continue Reading →

A survey on application-specific on-chip interconnects

On-chip interconnects provide a vital facility for highly parallel MultiProcessor Systems-on-Chip, particularly in data-intensive applications. This survey –authored by me and Edoardo Fusella– gives an in-depth overview of application-driven design automation solutions for on-chip interconnects, particularly  hierarchical buses, crossbars, and… Continue Reading →

GPU-like computing.
I’m lovin’ it.

One key insight behind my activities in the MANGO H2020 project is accelerator architecture exploration. Among other developments, one central activity that I planned and I’m now leading is the development of a customizable manycore system based on a GPU-like… Continue Reading →

So, I’m getting senior

… that means, older. Yes, unfortunately, I am.

MANGO accepted!

It’s not a clothing brand, but a new H2020 project, selected within the FETHPC programme as one of the large-scale actions exploring new architectures for tomorrow’s European HPC! I was part of the MANGO proposal core team, and this success… Continue Reading →

About the header on this blog: Tribute to Hayao Miyazaki

Most of the cover images appearing on this blog are drawn by (or related to) Japanese animation master Hayao Miyazaki. I’ll put them here just to borrow a bit of his inspiring, timeless magic and poetry.

Saying goodbye to that old-fashioned personal page

It’s time to drop that old-fashioned, boring, static HTML web page where I’ve been displaying sporadic updates about my work during the last 15 years (yes, 15 years!…) Thought it would be nice to set up a dynamic and more… Continue Reading →

Welcome!

Sticky post

This blog replaces my old-fashioned static HTML web page where I’ve been displaying sporadic updates about my work during the last 15 years. Maybe it’s still old-fashioned for some, but I found that a personal blog is a great tool… Continue Reading →

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